[Starlingx-discuss] StarlingX 3.0 features

Xie, Cindy cindy.xie at intel.com
Mon Jul 1 13:45:50 UTC 2019


I've created a Storyboard for Kata support:

https://storyboard.openstack.org/#!/story/2006145

we will do technical feasibility study and bring in/out proposal to release team.

thx. - cindy

From: Jones, Bruce E [mailto:bruce.e.jones at intel.com]
Sent: Friday, June 28, 2019 11:31 PM
To: Rowsell, Brent <Brent.Rowsell at windriver.com>
Cc: starlingx-discuss at lists.starlingx.io
Subject: Re: [Starlingx-discuss] StarlingX 3.0 features

"IA Platform features" are things like RDT (Resource Director Technology), SGX (Software Guard Extensions) and EPID (Extended Platform Identification).   These features tend to get added automatically when we upgrade to newer components but should be tested within StarlingX.

"Performance Testing" is creating an open framework to measure key performance indicators for StarlingX - things like network latency, fault detection times and so forth.

"IOT Device Management" is building on the demo you showed at Denver and taking that to the next level, enabling IOT gateways and similar devices.

        brucej

From: Rowsell, Brent [mailto:Brent.Rowsell at windriver.com]
Sent: Thursday, June 27, 2019 6:46 PM
To: Jones, Bruce E <bruce.e.jones at intel.com<mailto:bruce.e.jones at intel.com>>
Cc: starlingx-discuss at lists.starlingx.io<mailto:starlingx-discuss at lists.starlingx.io>
Subject: RE: [Starlingx-discuss] StarlingX 3.0 features

Bruce,

Since there won't be another TSC meeting til Jul 11th, can you provide some more detail on the 3 not discussed items.

Thanks,

Brent

From: Jones, Bruce E [mailto:bruce.e.jones at intel.com]
Sent: Thursday, June 27, 2019 12:16 PM
To: Rowsell, Brent <Brent.Rowsell at windriver.com<mailto:Brent.Rowsell at windriver.com>>
Cc: starlingx-discuss at lists.starlingx.io<mailto:starlingx-discuss at lists.starlingx.io>
Subject: Re: [Starlingx-discuss] StarlingX 3.0 features

Thank you, Brent for your review and questions.

1)      FPGA accelerator support is for OpenStack (e.g. Cyborg integration)

2)      Agree that the Containerized Ceph spec can/should be split

3)      "Lead" is the person responsible internally for getting the work done and is the contact for any questions about the feature.  It may or may not be the person who writes the spec.

     brucej

From: Rowsell, Brent [mailto:Brent.Rowsell at windriver.com]
Sent: Thursday, June 27, 2019 8:58 AM
To: Jones, Bruce E <bruce.e.jones at intel.com<mailto:bruce.e.jones at intel.com>>; starlingx-discuss at lists.starlingx.io<mailto:starlingx-discuss at lists.starlingx.io>
Subject: RE: [Starlingx-discuss] StarlingX 3.0 features

Bruce,

Thanks.
A couple of comments/questions.


1)      What's the difference between FPGA accelerator support and k8s fpga device plugin. As discussed at the TSC two wks ago, I have a dev that will be doing a spec for the later.

2)      Containerized CEPH. It would be good to break this into two specs I think, one for prep content (R3) and one to complete the integration

3)      What do we mean by Lead ? Spec owner ?

Brent


From: Jones, Bruce E [mailto:bruce.e.jones at intel.com]
Sent: Thursday, June 27, 2019 11:44 AM
To: starlingx-discuss at lists.starlingx.io<mailto:starlingx-discuss at lists.starlingx.io>
Subject: [Starlingx-discuss] StarlingX 3.0 features

Here is a list of StarlingX 3.0 features that our team plans to work on.  I would like to ask the TSC to please review the "Not yet discussed" features before closing on the 3.0 feature list.  Thank you!

            brucej


Work item

TSC status

Lead

Status

IA platform features

Not yet discussed

Abraham, Saul, Ada

Most work is validation, new features are integrated as we adopt newer kernels over time.  Real time features for industrial use cases are going into 5.x kernels and may (or may not) be back-portable.

Containerize OVS DPDK

AR Yong

Forrest

Not yet approved, Yong to get with Forrest and confirm intent

Performance testing

Not yet discussed

Victor, Ada

Proposal in progress

FPGA accelerator support

Push to 4.0

Abraham, Ada

Too big for 3.0 but will likely need to start soon.  FPGA hardware has been ordered

OpenStack Train integration

Approved

Bruce (Dean)

Continuous integration from OpenStack master

Containerized Ceph

Push to 4.0

Vivian

Too big for 3.0 but will likely need to start soon

Time Sensitive Networking

Approved

Forrest

Spec in progress

Kubernetes plugins for IA

Partial

Cindy

Some reviews in progress, QAT approved, FPGA likely 4.0

Redfish

Approved

Cindy

Spec in progress

IOT device management

Not yet discussed

Abraham

Demo'd @ Denver.  POC / pathfinding work for a customer in progress, item likely too big for 3.0

SUSE build support  & enablement

Approved

Abraham, Saul

In progress, previously approved for 2.0 and continuing on

Containerized OpenStack Clients

Approved

Dean?

Nearly completed for 2.0, pushed to 3.0


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